1. Field of the Invention
The present invention relates to a semiconductor device, more specifically a MIS (Metal Insulator Semiconductor) field effect transistor having a thin film SOI (Silicon On Insulator / Semiconductor On Insulator) structure.
2. Description of the Related Art
Recent improved performances of semiconductor devices largely depend on improved performances of unit transistors and reduction of their size. One of the high performance transistors that has attracted attention is a MIS field effect transistor having a thin film SOI structure.
One of the typical MIS field effect transistors having a thin film SOI structure is the mesa type transistor, in which an island of a silicon or semiconductor layer formed on an insulating layer, such as an SiO.sub.2 layer, comprises a channel region of one conductivity type at the center of the island and source and drain regions of opposite conductivity type adjacent to and sandwiching the channel region. A gate electrode is formed on and covers the top and two side surfaces of the channel region. The source and drain regions are connected to contacts or source and drain electrodes.
In this type of MIS field effect transistor having a thin film SOI structure, the breakdown voltage between the source and drain is low, at highest 4.5 V, because a parasitic bipolar transistor involved in this structure is activated at a low voltage.
An all round type MIS field effect transistor having a thin film SOI structure is also known. In this type, a gate electrode covers not only the top and two side surfaces but also the bottom surface of the channel region, that is, all around the channel region of the island of silicon or a semiconductor. Of cource, the gate electrode does not exist on the interfaces between the channel region and the source and drain regions.
This all around type MOS field effect transistor having a thin film SOI structure also has a low breakdown voltage between the source and drain, at highest 4.5 V, as a result of the concentration of an electric field in the drain region.
Thus, the object of the present invention is to provide MIS field effect transistors having a thin film SOI structure which may have an improved breakdown voltage between the source and drain.